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1 typical a pplica t ion fea t ures descrip t ion 36v in , ultrafast, low output noise 5a module regulator the lt m ? 8028 is a 36v in , 5a module ? regulator, con - sisting of an ultrafast? 5a linear regulator preceded by a high ef ficiency switching regulator. in addition to providing tight output regulation, the linear regulator automatically controls the output voltage of the switcher to provide optimal efficiency and headroom for dynamic response. the output voltage is digitally selectable in 50mv incre - ments over a 0.8v to 1.8v range. an analog margining function allows the user to adjust system output voltage over a continuous 10% range, and a single-ended feed - back sense line may be used to mitigate ir drops due to parasitic resistance. the LTM8028 is packaged in a compact (15mm 15mm 4.92mm) overmolded ball grid array (bga) package suit - able for automated assembly by standard surface mount equipment. the LTM8028 is available with snpb (bga) or rohs compliant terminal finish. a pplica t ions n high performance 5a linear regulator with switching step-down converter for high efficiency n digitally programmable v out : 0.8v to 1.8v n input voltage range: 6v to 36v n very tight tolerance over temperature, line, load and transient response n low output noise: 40v rms (10hz to 100khz) n parallel multiple devices for 10a or more n accurate programmable current limit to allow asymmetric power sharing n analog output margining: 10% range n synchronization input n stable with low esr ceramic output capacitors n 15mm 15mm 4.92mm sur face mount bga package n snpb or rohs compliant finish n fpga and dsp supplies n high speed i/o n asic and microprocessor supplies n servers and storage devices l , lt, ltc, ltm, module, linear technology and the linear logo are registered trademarks and ultrafast is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. + linear regulator v in v out sensep bkv run 150k v in 9v to 15v 82.5k f = 500khz 0.01f marga imax ss pgood 100f rt gnd v ob v o0 v o1 v o2 470f 8028 ta01a 137f v out 1.2v 5a sync LTM8028 10f v out 20mv/div full load noise and ripple 500v/div i out 2a/div ?i out = 0.5a to 5a 1s rise/fall time 10s/div 8028 ta01b 1s/div measured per an70, 150mhz bw low output noise, 1.2v, 5a module regulator click to view associated techclip videos. 8028fa for more information www.linear.com/LTM8028 LTM8028
2 a bsolu t e maxi m u m r a t ings v in ............................................................................ 40v v out ............................................................................ 3v run, s s, sync .......................................................... 6v cur rent into run .................................................. 100 a v ob , v o0 , v o1 , v o2 , test, pgood, sensep, marga ........................................... 4v rt, bk v, i max ............................................................. 3v maxi mum operating junction temperature (note 2) ................................................................. 125c m aximum body reflow temperature .................... 240 c maximum storage temperature ............................ 125c (notes 1, 4) e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, run = 3v unless otherwise noted. (note 2) p in c on f igura t ion a 1 2 3 4 5 6 7 8 9 10 11 b c d e f top view bank 1 bank 2 bank 3 sensep bank 4 run rt ss sync i max v in gnd bkv v out g h j k l test marga pgood v o0 v o1 v o2 v ob bga package 114 pads (15mm 15mm 4.92mm) t jmax = 125c, ja = 17.7c/w, jb = 6.0c/w, jctop = 15c/w, jcbottom = 6.0c/w values determined per jedec 51-9, 51-12 weight = 1.8 grams parameter conditions min typ max units minimum input voltage 6 v output dc voltage l l l l l 0.788 0.985 1.182 1.477 1.773 0.8 1.0 1.2 1.5 1.8 0.812 1.015 1.218 1.523 1.827 v v v v v output dc current v out = 1.8v 5 a o r d er i n f or m a t ion part number pad or ball finish part marking* package type msl rating temperature range (note 2) device finish code l tm8028ey#pbf sac305 (rohs) LTM8028y e1 bga 3 C40c to 125c LTM8028iy#pbf sac305 (rohs) LTM8028y e1 bga 3 C40c to 125c LTM8028iy snpb (63/37) LTM8028y e0 bga 3 C40c to 125c LTM8028mpy#pbf sac305 (rohs) LTM8028y e1 bga 3 C55c to 125c LTM8028mpy snpb (63/37) LTM8028y e0 bga 3 C55c to 125c consult marketing for parts specified with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container. pad or ball finish code is per ipc/jedec j-std-609. ? pb-free and non-pb-free part markings: www.linear.com/leadfree ? recommended lga and bga pcb assembly and manufacturing procedures: www.linear.com/umodule/pcbassembly ? lga and bga package and tray drawings: www.linear .com/packaging 8028fa for more information www.linear.com/LTM8028 LTM8028
3 e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTM8028e is guaranteed to meet performance specifications from 0c to 125c internal. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the LTM8028i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. the LTM8028mp is the l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, run = 3v unless otherwise noted. (note 2) parameter conditions min typ max units quiescent current into v in run = 0v no load 1 35 a ma line regulation 6v < v in < 36v, i out = 10ma l 1 mv load regulation 0.01a < i out < 5a, v out = 0.8v, bkv = 1.05v, run = 0v l C1.5 C3 C5.5 mv mv 0.01a < i out < 5a, v out = 1.0v, bkv = 1.25v, run = 0v l C2 C4 C7.5 mv mv 0.01a < i out < 5a, v out = 1.2v, bkv = 1.45v, run = 0v l C2 C4 C7.5 mv mv 0.01a < i out < 5a, v out = 1.5v, bkv = 1.75v, run = 0v l C2.5 C5 C9 mv mv 0.01a < i out < 5a, v out = 1.8v, bkv = 2.05v, run = 0v l C3 C7 C13 mv mv sense pin current v out = 0.8v v out = 1.8v 50 300 a a switching frequency r t = 40.2k r t = 200k 1000 200 khz khz run pin current run = 1.45v 5.5 a run threshold voltage (falling) l 1.49 1.55 1.61 v run input hysteresis 130 mv i max pin current i max = 0.75v 125 a i max current limit accuracy i max = 1.5v i max = 0.75v 5.0 2.20 6.1 3.6 a a ss pin current 11 a sync input threshold f sync = 500khz 0.8 1.2 v sync bias current sync = 0v 1 a v ob voltage 3.3 v v ox input low threshold v ob = 3.3v l 0.25 v v ox input high threshold v ob = 3.3v l 3.05 v v ox input z range v ob = 3.3v l 0.75 2.4 v v ox input current high 40 a v ox input current low 40 a marga pin current marga = 0v 3.5 a pgood threshold v out(nominal) = 1.0v, v out rising v out(nominal) = 1.0v, v out falling 0.9 0.85 v v output voltage noise (note 3) v out = 1.8v, c out = 137f, 5a load, bw = 10hz to 100khz 40 v rms guaranteed to meet specifications over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: guaranteed by design, characterization and correlation with statistical process controls. note 4: unless otherwise stated, the absolute minimum voltage is zero. 8028fa for more information www.linear.com/LTM8028 LTM8028
4 typical p er f or m ance c harac t eris t ics power loss vs output current, 1.5v out power loss vs output current, 1.8v out input current vs output current, 0.8v out input current vs output current, 1v out input current vs output current, 1.2v out input current vs output current, 1.5v out power loss vs output current, 0.8v out power loss vs output current, 1v out power loss vs output current, 1.2v out output current (a) 0 power loss (w) 3 4 5 4 8028 g01 2 1 0 1 2 3 5 36v in 24v in 12v in 6v in output current (a) 0 power loss (w) 3 4 5 4 8028 g02 2 1 0 1 2 3 5 36v in 24v in 12v in 6v in output current (a) 0 power loss (w) 3 4 5 4 8028 g03 2 1 0 1 2 3 5 36v in 24v in 12v in 6v in output current (a) 0 power loss (w) 3 4 5 4 8028 g04 2 1 0 1 2 3 5 36v in 24v in 12v in 6v in output current (a) 0 power loss (w) 3 4 5 4 8028 g05 2 1 0 1 2 3 5 36v in 24v in 12v in 6v in output current (a) 0 1000 1200 1400 4 8026 g06 800 600 1 2 3 5 400 200 0 input current (ma) 6v in 12v in 24v in 36v in output current (a) 0 input current (ma) 600 800 1000 3 5 8028 g07 400 200 0 1 2 4 1200 1400 1600 6v in 12v in 24v in 36v in output current (a) 0 0 input current (ma) 200 600 800 1000 2 4 5 1800 8028 g08 400 1 3 1200 1400 1600 6v in 12v in 24v in 36v in output current (a) 0 input current (ma) 1200 1600 2000 4 8028 g09 800 400 1000 1400 1800 600 200 0 1 2 3 5 6v in 12v in 24v in 36v in 8028fa for more information www.linear.com/LTM8028 LTM8028
5 typical p er f or m ance c harac t eris t ics transient response, demo board, 1v transient response, demo board, 1.2v transient response, demo board, 1.5v transient response, demo board, 1.8v output noise, 1.8v out output current vs i max voltage, 12v in input current vs output current, 1.8v out input current vs input voltage, output shorted output current vs input voltage, output shorted output current (a) 0 input current (ma) 1500 2000 2500 4 8028 g10 1000 500 0 1 2 3 5 6v in 12v in 24v in 36v in input voltage (v) 0 0 input current (ma) 200 400 600 800 1000 1200 10 20 30 40 8038 g11 input voltage (v) 0 5.0 output current (a) 5.2 5.4 5.6 5.8 6.0 6 12 18 24 8028 g12 30 36 i max voltage (v) 0 1 0 output current (a) 2 3 4 5 6 0.5 1.0 1.5 2.0 8028 g18 v out 20mv/div i out 2a/div ?i out 0.5a to 5a 1s rise/fall time 10s/div c out = 100f + 22f + 10f + 4.7f 8028 g13 v out 20mv/div i out 2a/div ?i out 0.5a to 5a 1s rise/fall time 10s/div c out = 100f + 22f + 10f + 4.7f 8028 g14 v out 20mv/div i out 2a/div ?i out 0.5a to 5a 1s rise/fall time 10s/div c out = 100f + 22f + 10f + 4.7f 8028 g15 v out 20mv/div i out 2a/div ?i out 0.5a to 5a 1s rise/fall time 20s/div c out = 100f + 22f + 10f + 4.7f 8028 g16 500v/div 1s/div measured with hp461a amplifier (150mhz bw) at j5 bnc connector on dc1738 demo board f sw = 500khz c out = 137f 5a load 8028 g17 8028fa for more information www.linear.com/LTM8028 LTM8028
6 typical p er f or m ance c harac t eris t ics temperature rise vs output current, 1.2v out temperature rise vs output current, 1.5v out temperature rise vs output current, 1.8v out output noise spectral density soft-start waveform vs c ss output voltage change vs marga voltage, 1v out temperature rise vs output current, 0.8v out temperature rise vs output current, 1v out marga voltage (v) 0 ?10 ?15 v out change (%) ?5 0 5 10 15 0.3 0.6 0.9 1.2 8028 g19 output current (a) 0 0 temperature rise (c) 10 20 30 40 50 60 1 2 3 4 8028 g20 5 36v in 24v in 12v in 6v in output current (a) 0 0 temperature rise (c) 10 20 30 40 50 60 1 2 3 4 8028 g21 5 36v in 24v in 12v in 6v in output current (a) 0 0 temperature rise (c) 10 20 30 40 50 60 1 2 3 4 8028 g22 5 36v in 24v in 12v in 6v in output current (a) 0 0 temperature rise (c) 10 20 30 40 50 60 1 2 3 4 8028 g23 5 36v in 24v in 12v in 6v in output current (a) 0 0 temperature rise (c) 10 20 30 40 50 60 1 2 3 4 8028 g24 5 36v in 24v in 12v in 6v in frequency (hz) 0.01 v/hz 0.1 1 10 10 100 1k 10k 100k 1m 0.001 8028 g25 c out = 137f v out = 1.8v i out = 5a v in = 12v 500mv/div 2ms/div v in = 12v 5a resistive load c out = 4.7f + 10f + 22f c bkv = 100f + 470f 8028 g26 c ss = open c ss = 10nf c ss = 47nf c ss = 100nf 8028fa for more information www.linear.com/LTM8028 LTM8028
7 p in func t ions v out (bank 1): power output pins. apply the output filter capacitor and the output load between these and the gnd pins. bkv (bank 2): buck regulator output. apply the step-down regulators bulk capacitance here (refer to table 1). do not connect this to the load. do not drive a voltage into bkv. gnd (bank 3): tie these gnd pins to a local ground plane below the LTM8028 and the circuit components. in most applications, the bulk of the heat flow out of the LTM8028 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. v in (bank 4): the v in pin supplies current to the LTM8028s internal regulator and to the internal power switch. this pin must be locally bypassed with an external, low esr capacitor; see table 1 for recommended values. v o0 , v o1 , v o2 (pin a6, pin b6, pin a5): output voltage select. these three-state pins combine to select a nominal output voltage from 0.8v to 1.8v in increments of 50mv. see table 2 in the applications information section that defines the v o2 , v o1 and v o0 settings versus v out . marga (pin a7): analog margining: this pin margins the output voltage over a continuous analog range of 10%. tying this pin to gnd adjusts output voltage by C10%. driving this pin to 1.2v adjusts output voltage by 10%. a voltage source or a voltage output dac is ideal for driving this pin. if the marga function is not used, either float this pin or terminate with a 1nf capacitor to gnd. test (pin a8): factory test. leave this pin open. sensep (pin a9): kelvin sense for v out . the sensep pin is the inverting input to the error amplifier. optimum regulation is obtained when the sensep pin is connected to the v out pins of the regulator. in critical applications, the resistance of pcb traces between the regulator and the load can cause small voltage drops, creating a load regulation error at the point of load. connecting the sensep pin at the load instead of directly to v out eliminates this voltage error. the sensep pin input bias current depends on the selected output voltage. sensep pin input current varies from 50a typically at v out = 0.8v to 300a typically at v out = 1.8v. sensep must be connected to v out , either locally or remotely. v ob (pin b5): bias for v o0 , v o1 , v o2 . this is a 3.3v source to conveniently pull up the v o0 , v o1 , v o2 pins, if desired. if not used, leave this pin floating. i max (pin d1): sets the maximum output current. con- nect a resistor/ ntc thermistor network to the i max pin to reduce the maximum regulated output current of the LTM8028 in response to temperature. this pin is internally pulled up to 2v through a 10k resistor, and the control voltage range is 0v to 1.5v. ss (pin d2): the soft-start pin. place an external capacitor to ground to limit the regulated current during start-up conditions. the soft-start pin has an 11a charging current. rt (pin e1): the rt pin is used to program the switching frequency of the LTM8028s buck regulator by connect - ing a resistor from this pin to ground. the applications information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. when using the sync function, set the frequency to be 20% lower than the sync pulse frequency. do not leave this pin open. sync (pin e2): frequency synchronization pin. this pin allows the switching frequency to be synchronized to an external clock. the r t resistor should be chosen to oper - ate the internal clock at 20% slower than the sync pulse frequency. this pin should be grounded when not in use. do not leave this pin floating. when laying out the board, avoid noise coupling to or from the sync trace. see the synchronization section in applications information. run (pin f1): the run pin acts as an enable pin and turns off the internal circuitry at 1.55v. the pin does not have any pull-up or pull-down, requiring a voltage bias for normal part operation. the run pin is internally clamped, so it may be pulled up to a voltage source that is higher than the absolute maximum voltage of 6v, provided the pin current does not exceed 100a. 8028fa for more information www.linear.com/LTM8028 LTM8028
8 b lock diagra m 5a linear regulator input-output control current mode controller 10 v out bkv 2.2h run sync ss rt i max 10f 0.2f sensep test marga pgood v o0 8028 bd v in v in v o1 v o2 v ob gnd internal power 8028fa for more information www.linear.com/LTM8028 LTM8028
9 o pera t ion current generation fpga and asic processors place stringent demands on the power supplies that power the core, i/o and transceiver channels. power supplies that power these processors have demanding output voltage specifications, especially at low voltages, where they require tight tolerances, small transient response excur - sions, low noise and high bandwidth to achieve the lowest bit-error rates. this can be accomplished with some high performance linear regulators, but this can be inefficient for high current and step-down ratios. the LTM8028 is a 5a high efficiency, ultrafast transient response linear regulator. it integrates a buck regulator with a high performance linear regulator, providing a precisely regulated output voltage digitally programmable from 0.8v to 1.8v. as shown in the block diagram, the LTM8028 contains a current mode controller, power switches, power inductor, linear regulator, and a modest amount of capacitance. to achieve high efficiency, the integrated buck regulator is automatically controlled (input-output control on the block diagram) to produce the optimal voltage headroom to balance efficiency, tight regulation and transient response at the linear regulator output. figure 1 is a composite graph of the LTM8028s power loss compared to the theoretical power loss of a traditional linear regulator. note that the power loss (left hand y axis) is plotted on the log scale. for 1.2v out at 5a and 24v in the LTM8028 only loses 4w, while the traditional linear regulator theoretically dissipates over 110w. the LTM8028 switching buck converter utilizes fixed- frequency, forced continuous current mode control to regulate its output voltage. this means that the switching regulator will stay in fixed frequency operation even as the LTM8028 output current falls to zero. the LTM8028 has an analog control pin, i max , to set the maximum allow - able current output of the LTM8028. the analog control range of i max is from 0v to 1.5v. the run pin functions as a precision shutdown pin. when the voltage at the run pin is lower than 1.55v, switching is terminated. below this threshold, the run pin sinks 5.5a. this current can be used with a resistor between run and v in to set the hysteresis. during start-up, the ss pin is held low until the part is enabled, after which the capacitor at the soft-start pin is charged with an 11a current source. the switching frequency is determined by a resistor at the rt pin. the LTM8028 may also be synchronized to an external clock through the use of the sync pin. the output linear regulator supplies up to 5a of output current with a typical dropout voltage of 85mv. its high bandwidth provides ultrafast transient response using low esr ceramic output capacitors, saving bulk capacitance, pcb area and cost. the output voltage for the LTM8028 is digitally selectable in 50mv increments over a 0.8v to 1.8v range, and analog margining function allows the user to adjust system output voltage over a continuous 10% range. it also features a remote sense pin for accurate regulation at the load, and a pgood circuit that indicates whether the output is in or out of regulation or if an internal fault has occurred. the LTM8028 is equipped with a thermal shutdown to protect the device during momentary overload conditions. it is set above the 125c absolute maximum internal tem - perature rating to avoid interfering with normal specified operation, so internal device temperatures will exceed the absolute maximum rating when the overtemperature protection is active. so, continuous or repeated activation of the thermal shutdown may impair device reliability. during thermal shutdown, all switching is terminated and the ss pin is driven low . input voltage (v) 0 0 power loss (w) temperature rise (c) 10 100 1000 30 40 50 60 35 45 55 10 20 8028 f01 30 40 traditional linear regulator power loss temperature rise power loss figure 1. this graph shows the full load power loss and temperature rise of the LTM8028 over a range of input voltages. compare these numbers to a traditional linear regulator powering the same load an operating condition. note the log scale for power loss. 8028fa for more information www.linear.com/LTM8028 LTM8028
10 a pplica t ions i n f or m a t ion for most applications, the design process is straight forward, summarized as follows: 1. look at table 1 and find the row that has the desired input range and output voltage. 2. apply 10f to v in and the recommended r t value (r t(optimal) in table 1). lower r t values (resulting in a higher operating frequency) may be used to reduce the output ripple. do not use values below r t(min) . 3. apply a parallel combination of a 100f ceramic and a 470f electrolytic to bkv. the sanyo os-con 6sep - c470m or united chemi-con apxf6r3ara471mh80g work well for the electrolytic capacitor, but other devices with an esr about 10m may be used. 4. apply a minimum of 37f to v out . as shown in table?1, this is usually a parallel combination of 4.7f, 10f and 22f capacitors. 5. apply an additional 100f capacitor to v out if very small (2%) transient response is required. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current is limited by junction tempera - ture, the relationship between the input and output voltage magnitude and polarity and other factors. please refer to the graphs in the t ypical performance characteristics section for guidance. the maximum frequency (and attendant r t value) at which the LTM8028 should be allowed to switch is given in table 1 in the f max column, while the recommended frequency (and r t value) for optimal efficiency over the given input condition is given in the f optimal column. there are additional conditions that must be satisfied if the synchronization function is used. please refer to the synchronization section for details. programming output voltage three tri-level input pins, v o2 , v o1 and v o0 , select the value of output voltage. table 2 illustrates the 3-bit digital word- to-output voltage resulting from setting these pins high, low or allowing them to float. these pins may be tied high or low by either pin-strapping them to v ob or driving them table 1: recommended component values and configuration (t a = 25c) v in v out f optimal r t(optimal) f max r t(min) 6v to 36v 0.8v 200khz 200k 250khz 165k 6v to 36v 1.0v 250khz 165k 280khz 150k 6v to 36v 1.2v 250khz 165k 315khz 133k 6v to 36v 1.5v 250khz 165k 333khz 127k 6v to 36v 1.8v 315khz 133k 385khz 107k 9v to 15v 0.8v 250khz 165k 650khz 61.9k 9v to 15v 1.0v 280khz 150k 750khz 53.6k 9v to 15v 1.2v 300khz 143k 800khz 49.9k 9v to 15v 1.5v 315khz 133k 1mhz 40.2k 9v to 15v 1.8v 350khz 118k 1mhz 40.2k 18v to 36v 0.8v 200khz 200k 250khz 165k 18v to 36v 1.0v 250khz 165k 280khz 150k 18v to 36v 1.2v 250khz 165k 315khz 133k 18v to 36v 1.5v 250khz 165k 333khz 127k 18v to 36v 1.8v 315khz 133k 385khz 107k c in : 10f, 50v, 1210 c bkv : 100f, 6.3v, 1210 + 470f, 6.3v low esr electrolytic c out : 4.7f, 4v, 0603 + 10f, 10v, 0805 + 22f, 10v, 0805 c out (optional): 100f, 6.3v, 1210 note: an input bulk capacitor is required. 8028fa for more information www.linear.com/LTM8028 LTM8028
11 a pplica t ions i n f or m a t ion with digital ports. pins that float may either actually float or require logic that has hi-z output capability. this allows the output voltage to be dynamically changed if necessary. the output voltage is selectable from a minimum of 0.8v to a maximum of 1.8v in increments of 50mv. table 2. v o2 to v o0 setting vs output voltage v o2 v o1 v o0 v out(nom) v o2 v o1 v o0 v out(nom) 0 0 0 0.80v z 0 1 1.35v 0 0 z 0.85v z z 0 1.40v 0 0 1 0.90v z z z 1.45v 0 z 0 0.95v z z 1 1.50v 0 z z 1.00v z 1 0 1.55v 0 z 1 1.05v z 1 z 1.60v 0 1 0 1.10v z 1 1 1.65v 0 1 z 1.15v 1 x 0 1.70v 0 1 1 1.20v 1 x z 1.75v z 0 0 1.25v 1 x 1 1.80v z 0 z 1.30v x = dont care, 0 = low, z = float, 1 = high capacitor selection considerations the c in , c bkv and c out capacitor values in table 1 are the minimum recommended values for the associated oper - ating conditions. applying capacitor values below those indicated in t able 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary . again, it is incumbent upon the user to verify proper operation over the intended system s line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap - plied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application cir - cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. the output capacitance for bkv given in table 1 specifies an electrolytic capacitor. ceramic capacitors may also be used in the application, but it may be necessary to use more of them. many high value ceramic capacitors have a large voltage coefficient, so the actual capacitance of the component at the desired operating voltage may be only a fraction of the specified value. also, the very low esr of ceramic capacitors may necessitate an additional capacitor for acceptable stability margin. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8028. a ceramic input capacitor combined with trace or cable inductance forms a high q (under damped) tank circuit. if the LTM8028 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi - bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. why do multiple, small value output capacitors connected in parallel work better? the parasitic series inductance (esl) and resistance (esr) of a capacitor can have a detrimental impact on the transient and ripple/noise response of a linear regulator . employing a number of capacitors in parallel will reduce this parasitic impedance and improve the performance of the linear regulator. in addition, pcb vias can add significant inductance, so the fundamental decoupling capacitors must be mounted on the same copper plane as the LTM8028. the most area efficient parallel capacitor combination is a graduated 4/2/1 scale capacitances of the same case size, such as the 37f combination in table 1, made up of 22f, 10f and 4.7f capacitors in parallel. capacitors with small case sizes have larger esr, while those with larger case sizes have larger esl. as seen in table 1, the optimum case size is 0805, followed by a larger, fourth bulk energy capacitor, case sized 1210. in general, the large fourth capacitor is required only if very tight transient response is required. 8028fa for more information www.linear.com/LTM8028 LTM8028
12 a pplica t ions i n f or m a t ion output voltage margining the LTM8028s analog margining pin, marga, provides a continuous output voltage adjustment range of 10%. it margins v out by adjusting the internal 600mv reference voltage up and down. driving marga with 600mv to 1.2v provides 0% to 10% of adjustment. driving marga with 600mv to 0v provides 0% to C10% of adjustment. if unused, allow marga to float or bypass this pin with a 1nf capacitor to gnd. note that the analog margining function does not adjust the pgood threshold. therefore, negative analog margining may trip the pgood comparator and toggle the pgood flag. power good pgood pin is an open-drain nmos digital output that ac - tively pulls low if any one of these fault modes is detected: ? v out is less than 90% of v out(nominal) on the rising edge of v out . ? v out drops below 85% of v out(nominal) for more than 25s. ? internal faults such as loss of internal housekeeping voltage regulation, reverse-current on the power switch and excessive temperature. sensep and load regulation the LTM8028 provides a kelvin sense pin for v out , allowing the application to correct for parasitic package and pcb ir drops. if the load is far from the LTM8028, running a separate line from sensep to the remote load will correct for ir voltage drops and improve load regulation. sensep is the only voltage feedback that the LTM8028 uses to regulate the output, so it must be connected to v out , either locally or at the load. in some systems, a loss of feedback signal equates to a loss of output control, potentially damaging the load. if the sensep signal is inadvertently disconnected from the load, internal safety circuits in the LTM8028 prevent the output from running away. this also limits the amount of correction to about 0.2v. bear in mind that the linear regulator of the LTM8028 is a high bandwidth power device. if the load is very far from the LTM8028, the parasitic impedance of the remote connection may interfere with the internal control loop and adversely affect stability. if sensep is connected to a remote load, the user must evaluate the load regulation and dynamic load response of the LTM8028. short-circuit and overload recovery like many ic power regulators, the internal linear regulator has safe operating area (soa) protection. the safe area protection decreases current limit as input-to-output volt - age increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage up to the absolute maximum voltage rating. under maximum i load and maximum v in -v out conditions, the internal linear regulators power dissipation peaks at about 1.5w. if ambient temperature is high enough, die junction temperature will exceed the 125c maximum operating temperature. if this occurs, the LTM8028 relies on two additional thermal safety features. at about 145c, the device is designed to make the pgood output pull low providing an early warning of an impending thermal shutdown condition. at 165c typically, the LTM8028 is designed to engage its thermal shutdown and the output is turned off until the ic temperature falls below the thermal hysteresis limit. the soa protection decreases current limit as the in-to-out voltage increases and keeps the power dissipation at safe levels for all values of input- to-output voltage. 8028fa for more information www.linear.com/LTM8028 LTM8028
13 a pplica t ions i n f or m a t ion reverse voltage the LTM8028 incorporates a circuit that detects if bkv decreases below v out . if this voltage condition is detected, internal circuitry turns off the drive to the internal linear regulators pass transistor, thereby turning off the output. this circuits intent is to limit and prevent back-feed current from v out to v in if the input voltage collapses due to a fault or overload condition. do not apply a voltage to bkv. programming switching frequency the LTM8028 has an operational switching frequency range between 200khz and 1mhz. this frequency is programmed with an external resistor from the rt pin to ground. do not leave this pin open under any condition. the rt pin is also current limited to 60a. see table 3 for resistor values and the corresponding switching frequencies. table 3. r t resistor values and their resultant switching frequencies switching frequency (mhz) r t (k) 1 40.2 0.750 53.6 0.5 82.5 0.3 143 0.2 200 switching frequency trade-offs it is recommended that the user apply the optimal r t value given in table 1 for the input and output operating condi - tion. system level or other considerations, however, may n eces s itate another operating frequency. a higher switching frequency, for example, will yield a smaller output ripple, while a lower frequency will reduce power loss. switch - ing too fast, however, can generate excessive heat and even possibly damage the LTM8028 in fault conditions. switching too slow can result in a final design that has too much output capa citance or sub-harmonic oscillations that cause excessive ripple. in all cases, stay below the stated maximum frequency (f max ) given in table 1. switching frequency synchronization the nominal switching frequency of the LTM8028 is determined by the resistor from the rt pin to gnd and may be set from 200khz to 1mhz. the internal oscillator may also be synchronized to an external clock through the sync pin. the external clock applied to the sync pin must have a logic low below 0.25v and a logic high greater than 1.25v. the input frequency must be 20% higher than the frequency determined by the resistor at the rt pin. the duty cycle of the input signal needs to be greater than 10% and less than 90%. input signals outside of these specified parameters will cause erratic switching behavior and subharmonic oscillations. when synchronizing to an external clock, please be aware that there will be a fixed delay from the input clock edge to the edge of switch. the sync pin must be tied to gnd if the synchronization to an external clock is not required. when sync is grounded, the switching frequency is determined by the resistor at the rt pin. soft-start the soft-start function controls the slew rate of the power supply output voltage during start-up. a controlled output voltage ramp minimizes output voltage overshoot, reduces inrush current from the v in supply, and facilitates supply sequencing. a capacitor connected from the ss pin to gnd programs the slew rate. the capacitor is charged from an internal 11a current source to produce a ramped output voltage. maximum output current adjust to adjust the regulated load current, an analog voltage is applied to the i max pin. varying the voltage between 0v and 1.5v adjusts the maximum current between the minimum and the maximum current, 5.6a typical. above 1.5v, the control voltage has little effect on the regulated inductor current. a graph of the output current versus i max voltage is given in the typical performance characteristics 8028fa for more information www.linear.com/LTM8028 LTM8028
14 section. there is a 10k resistor internally connected from a 2v reference to the i max pin, so the current limit can be set as shown in figure 2 with the following equation: r imax = 10 ? i max 7.467 ?i max k ? a pplica t ions i n f or m a t ion LTM8028 when the run pin voltage falls to 1.55v. there is also an internal current source that provides 5.5a of pull-down current to program additional uvlo hysteresis. for run rising, the current source is sinking 5.5a until run = 1.68v, after which it turns off. for run falling, the current source is off until the run = 1.55v, after which it sinks 5.5a. the following equations determine the voltage divider resistors for programming the falling uvlo voltage and rising enable voltage (v ena ) as configured in figure 3. r1 = 1.55 ? r2 uvlo ? 1.55 ? ? ? ? ? ? r2 = v ena ? 1.084 ? uvlo 5.5a figure 2. setting the output current limit, i max i max r imax 8028 f02 LTM8028 thermal shutdown at about 145c, the LTM8028 is designed to make the pgood output pull low providing an early warning of an impending thermal shutdown condition. at 165c typically, the LTM8028 is designed to engage its thermal shutdown, discharge the soft-start capacitor and turn off the output until the internal temperature falls below the thermal hysteresis limit. when the part has cooled, the part automatically restarts. note that this thermal shutdown is set to engage at temperatures above the 125c absolute maximum internal operating rating to ensure that it does not interfere with functionality in the specified operating range. this means that internal temperatures will exceed the 125c absolute maximum rating when the overtemperature protection is active, so repeated or prolonged operation under these conditions may impair the devices reliability. uvlo and shutdown the LTM8028 has an internal uvlo that terminates switch - ing, resets all logic, and discharges the soft-start capacitor for input voltages below 4.2v. the LTM8028 also has a precision run function that enables switching when the voltage at the run pin rises to 1.68v and shuts down the v in v in run r2 r1 8028 f03 LTM8028 figure 3. uvlo configuration the run pin has an absolute maximum voltage of 6v. to accommodate the largest range of applications, there is an internal zener diode that clamps this pin, so that it can be pulled up to a voltage higher than 6v through a resistor that limits the current to less than 100a. for applications where the supply range is greater than 4:1, size r2 greater than 375k. pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the LTM8028. the LTM8028 is neverthe - less a switching power supply, and care must be taken to 8028fa for more information www.linear.com/LTM8028 LTM8028
15 minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 4 for a suggested layout. ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place the r t resistor as close as possible to its respec - tive pins. 2. place the c in capacitor as close as possible to the v in and gnd connection of the LTM8028. 3. place the c out capacitors as close as possible to the v out and gnd connection of the LTM8028. 4. place the c in , c bkv and c out capacitors such that their ground current flow directly adjacent or underneath the LTM8028. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the LTM8028. 6. use vias to connect the gnd copper area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 4. the LTM8028 can benefit from the heat sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. a pplica t ions i n f or m a t ion figure 4. layout showing suggested external components, gnd plane and thermal vias sensep (output is set to 1.55v) gnd bkv c bkv c out v out run c in 8028 f04 v in gnd thermal vias gnd rt ss sync i max test marga pgood v o0 v o1 v o2 v ob 8028fa for more information www.linear.com/LTM8028 LTM8028
16 load sharing each LTM8028 features an accurate current limit that en - ables the use of multiple devices to power a load heavier than 5a. this is accomplished by simply tying the v out terminals of the LTM8028s together, and set the outputs of the parallel units to the same voltage. there is no need to power the module regulators from the same power supply. that is, the application can use multiple LTM8028s, each powered from separate input voltage rails and contribute a different amount of current to the load as dictated by the programmed current limit. keep in mind that the paralleled LTM8028s will not share current equally. in most cases, one LTM8028 will provide almost all the load until its current limit is reached, and then the other unit or units will start to provide current. this might be an unacceptable operat - ing condition in other power regulators, but the accurate current loop of the LTM8028 controls the electrical and thermal performance of each individual module regulator. this prevents the oscillations, thermal runaway and other issues that other regulators might suffer. an example of two LTM8028s connected in parallel to deliver 1.8v at 10a, while powered from two disparate power sources, is given in the typical applications section. a graph of the output current delivered from each module regulator is given below in figure 5. hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8028. however, these capacitors can cause problems if the LTM8028 is plugged into a live input supply (see application note 88 for a complete dis - cussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the v in pin of the LTM8028 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8028s rating and damaging the part. if the input supply is poorly con - trolled or the user will be plugging the LTM8028 into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in , but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the v in net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filter - ing and can slightly improve the efficiency of the circuit, though it is physically large. a pplica t ions i n f or m a t ion total load current (a) 1 0 current delivered by LTM8028s (a) 1 2 3 4 5 6 2 4 6 8 8028 f05 10 figure 5. in most cases where paralleled LTM8028s are used, one module will deliver all of the load current until its current limit is reached, then the other unit(s) will provide current. the tightly controlled output current prevents oscillations and thermal runaway observed in other types of regulators 8028fa for more information www.linear.com/LTM8028 LTM8028
17 a pplica t ions i n f or m a t ion thermal considerations the LTM8028 relies on two thermal safety features. at about 145c, the device is designed to pull the pgood output low providing an early warning of an impending thermal shutdown condition. at 165c typically, the LTM8028 is designed to engage its thermal shutdown and the output is turned off until the ic temperature falls below the thermal hysteresis limit. note that these temperature thresholds are above the 125c absolute maximum rating to avoid interfering with normal operation. thus, prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. the LTM8028 output current may need to be derated if it is required to operate in a high ambient temperature. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance characteristics section can be used as a guide. these curves were generated by the LTM8028 mounted to a 58cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions. for increased accuracy and fidelity to the actual application, many designers use finite element analysis (fea) to predict thermal performance. to that end, the pin configuration of the data sheet typically gives four thermal coefficients: ja C thermal resistance from junction to ambient jcbottom C thermal resistance from junction to the bottom of the product case jctop C thermal resistance from junction to top of the product case jboard C thermal resistance from junction to the printed circuit board. while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confusion and inconsistency. these definitions are given in jesd 51-12, and are quoted or paraphrased below: ja is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. jcbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. in the typical module regulator, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient envi - ronment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. jctop is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module regulator are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junc - tion to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. jb is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module regulator and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured a specified distance from the package, using a 2-sided, 2-layer board. this board is described in jesd 51-9. 8028fa for more information www.linear.com/LTM8028 LTM8028
18 1v at 5a regulator with 2% transient response transient response from 0.5a to 5a, 1s load current rise and fall time, 12v in load current 2a/div v out 20mv/div 1s/div 8028 ta03 typical a pplica t ions given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a module regulator. thus, none of them can be individually used to accurately predict the thermal performance of the product. likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature vs load graphs given in the products data sheet. the only appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. a graphical representation of these thermal resistances is given in figure 6: the blue resistances are contained within the module regulator, and the green are outside. the die temperature of the LTM8028 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8028. the bulk of the heat flow out of the LTM8028 is through the bottom of the module and the lga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, result - ing in impaired performance or reliability. please refer to the pcb layout section for printed cir cuit board design suggestions. a pplica t ions i n f or m a t ion 8028 f06 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction ambient case (bottom)-to-board resistance figure 6. thermal model of module + linear regulator v in v out sensep bkv run 402k v in 6v to 36v 165k 0.01f marga imax ss pgood 100f rt gnd v ob v o0 v o1 v o2 470f *137f = 4.7f + 10f + 22f +100f in parallel 8028 ta02 137f* v out 1v 5a sync LTM8028 10f 8028fa for more information www.linear.com/LTM8028 LTM8028
19 1.8v regulator with 3.5a current limit output current (a) 0 0 output voltage (v) 0.2 0.6 0.8 1.0 2.0 1.4 1 2 8028 ta05 0.4 1.6 1.8 1.2 3 4 output voltage vs current + linear regulator v in v out sensep bkv run 402k 10k v in 6v to 36v 133k 0.01f marga imax ss pgood 100f rt gnd v ob v o0 v o1 v o2 470f *37f = 4.7f + 10f + 22f in parallel 8028 ta04 37f* v out 1.8v 3.5a sync LTM8028 10f typical a pplica t ions 1.8v, 10a with two LTM8028s powered from two different sources each module regulator is limited to provide a maximum of 5a + linear regulator v in v out sensep bkv run 402k 20.5k v in 24v 133k 0.01f marga imax ss pgood 100f rt gnd v ob v o0 v o1 v o2 330f *17f = 2.2f + 4.7f + 10f in parallel 17f* v out 1.8v 10a sync LTM8028 10f + linear regulator v in v out sensep bkv run 150k 20.5k v in 12v 133k 0.01f marga imax ss pgood 100f rt gnd v ob v o0 v o1 v o2 330f 8028 ta06 17f* sync LTM8028 10f 8028fa for more information www.linear.com/LTM8028 LTM8028
20 low noise LTM8028 powering 16-bit, 125msps adc 32k-point fft, f in = 70.3mhz, C1dbfs, 100msps typical a pplica t ions + linear regulator v in v out sensep bkv run 402k v in 6v to 36v 133k 0.01f marga imax ss pgood 100f rt gnd v ob v o0 v o1 v o2 470f a in + v dd enc + enc ? lt c ? 2185 adc gnd ov dd a in ? 8028 ta08a 137f* 1.8v 0v v out 1.8v 5a sync LTM8028 10f *137f = 4.7f + 10f + 22f + 100f in parallel frequency (mhz) 0 magnitude (dbfs) ?60 ?40 ?20 0 40 8028 ta08b ?80 ?100 ?70 ?50 ?30 ?10 ?90 ?110 ?120 10 20 30 50 8028fa for more information www.linear.com/LTM8028 LTM8028
21 p ackage descrip t ion p ackage p ho t o table 3. pin assignment table (arranged by pin number) pin name pin name pin name pin name pin name pin name a1 gnd b1 gnd c1 gnd d1 i max e1 rt f1 run a2 gnd b2 gnd c2 gnd d2 ss e2 sync f2 gnd a3 gnd b3 gnd c3 gnd d3 gnd e3 gnd f3 gnd a4 gnd b4 gnd c4 gnd d4 gnd e4 gnd f4 gnd a5 v o2 b5 v ob c5 gnd d5 gnd e5 gnd f5 gnd a6 v o0 b6 v o1 c6 gnd d6 gnd e6 gnd f6 gnd a7 marga b7 pgood c7 gnd d7 gnd e7 gnd f7 gnd a8 test b8 gnd c8 gnd d8 gnd e8 gnd f8 gnd a9 sensep b9 gnd c9 gnd d9 gnd e9 gnd f9 gnd a10 v out b10 v out c10 v out d10 v out e10 v out f10 v out a11 v out b11 v out c11 v out d11 v out e11 v out d11 v out pin name pin name pin name pin nam pin name g1 C h1 v in j1 v in k1 v in l1 v in g2 C h2 v in j2 v in k2 v in l2 v in g3 C h3 C j3 C k3 C l3 C g4 gnd h4 gnd j4 gnd k4 gnd l4 gnd g5 gnd h5 gnd j5 gnd k5 gnd l5 gnd g6 gnd h6 gnd j6 gnd k6 gnd l6 gnd g7 gnd h7 gnd j7 gnd k7 gnd l7 gnd g8 gnd h8 gnd j8 gnd k8 gnd l8 gnd g9 gnd h9 gnd j9 bkv k9 bkv l9 bkv g10 gnd h10 gnd j10 bkv k10 bkv l10 bkv g11 gnd h11 gnd j11 bkv k11 bkv l11 bkv 8028fa for more information www.linear.com/LTM8028 LTM8028
22 p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 6.350 6.350 3.810 3.810 5.080 5.080 2.540 2.540 1.270 1.270 bga package 114-lead (15mm 15mm 4.92mm) (reference ltc dwg # 05-08-1894 rev a) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 5. primary datum -z- is seating plane 6. the total number of pads: 114 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature package top view 4 pad ?a1? corner x y aaa z aaa z package bottom view 3 see notes suggested pcb layout top view detail a pad 1 0.000 6.350 6.350 3.810 3.810 5.080 5.080 2.540 2.540 1.270 1.270 0.000 f g h l j k e a b c d 2 1 4 3 11 9 5 10 678 d 0.630 0.025 ? 114x e b e e b f g bga 114 1112 rev a tray pin 1 bevel package in tray loading orientation component pin ?a1? ltmxxxxxx module detail a ?b (114 places) detail b substrate 0.27 ? 0.37 3.95 ? 4.05 // bbb z a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee a2 symbol a a1 a2 b b1 d e e f g aaa bbb ccc ddd eee min 4.72 0.50 4.22 0.60 0.60 nom 4.92 0.60 4.32 0.75 0.63 15.0 15.0 1.27 12.70 12.70 max 5.12 0.70 4.42 0.90 0.66 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 114 7 package row and column labeling may vary among module products. review each package layout carefully ! 7 see notes 8028fa for more information www.linear.com/LTM8028 LTM8028
23 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 2/14 added snpb bga package option 1, 2 8028fa for more information www.linear.com/LTM8028 LTM8028
24 ? linear technology corporation 2013 lt 0214 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LTM8028 r ela t e d p ar t s typical a pplica t ion part number description comments ltm8032 step-down module regulator, en55022b compliant 3.6v v in 36v, 0.8v v out 10v, 2a ltm4613 step-down module regulator, en55022b compliant 5v v in 36v, 3.3v v out 15v, 8a ltm8027 60v, 4a step-down module regulator 4.5v v in 60v, 2.5v v out 24v, 4a ltm8048 isolated module converter 725v isolation, 3.1v v in 32v, 1.2v v out 12v, 300ma ltm4615 triple output step-down module regulator 2.375v v in 5.5v, 0.8v v out 5.5v, 4a, 4a, 1.5a ltm4620 dual 13a, single 26a step-down module regulator 4.5v v in 16v, 0.6v v out 2.5v, up to 100a current sharing 1v at 5a regulator + linear regulator v in v out sensep bkv run 402k v in 6v to 36v 165k 0.01f marga imax ss pgood 100f rt gnd v ob v o0 v o1 v o2 470f *37f = 4.7f + 10f + 22f in parallel 8028 ta07 37f* v out 1v 5a sync LTM8028 10f 8028fa for more information www.linear.com/LTM8028 LTM8028

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